USB-BDI
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00001 /* USB-BDI Used for programming and debugging a MPC555 over USB 00002 * 00003 * Copyright 2005 NTB Interstate University of Applied Sciences of Technology Buchs 00004 * 00005 * This program is free software: you can redistribute it and/or modify 00006 * it under the terms of the GNU General Public License as published by 00007 * the Free Software Foundation, either version 3 of the License, or 00008 * (at your option) any later version. 00009 * 00010 * This program is distributed in the hope that it will be useful, 00011 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00012 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00013 * GNU General Public License for more details. 00014 */ 00015 00024 #include "usbpdi_common.h" 00025 #include "usbpdi_main.h" 00026 #include "BDI_555.h" 00027 #include "delay.h" 00028 00033 void BDI_555_init() 00034 { 00035 /* 00036 * BDIddr (STATUS_LED2 STATUS_LED1 BERR DSCK DSDI DSDO HARD_RESET FREEZE) 00037 * 0 = input, 1 = output 00038 */ 00039 BDIddr = BDIddrInit; // 11000010 00040 BDIout = BDIoutInit; // 00000010 00041 } 00042 00047 void BDI_555_hard_reset() 00048 { 00049 // set DSCK and DSDI as output to override the values of the TP3465 chip 00050 BDIddr = BDIddrInit | bmDSCK | bmDSDI; 00051 // Documentation: RCPU RM 8.4.1 00052 DSCK = 1; 00053 DSDI = 0; 00054 HARD_RESET = 0; 00055 mdelay(50); 00056 HARD_RESET = 1; 00057 mdelay(50); // if we omit this delay, debug mode will not be enabled 00058 // set DSCK and DSDI as input 00059 BDIddr = BDIddrInit; 00060 } 00061 00062 00068 void BDI_555_35(){ 00069 00070 #ifdef TIMEOUT_EXCEPTION_ON 00071 exceptionOnTimeoutOn(); 00072 // wait for DSDO to go low 00073 while (DSDO) { 00074 // return if exception packet sent 00075 if (!exceptionOnTimeout) { return; } 00076 } 00077 exceptionOnTimeoutOff(); 00078 #endif 00079 00080 // sending data to peripherals (hardware assisted chip select) 00081 // 1: write LOW byte data to SMB + HIGH byte to FMB(Dx) 00082 // MS Bit is transmitted first -> HIGH byte is sent first 00083 // 2: loop until uwdone bit is set 00084 00085 //CKCON = 5; // MOVX takes 9 cycles (583 ns @ 48MHz) 00086 00087 // send first two bytes 00088 SMB = usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET + 1]; 00089 FMBD0 = usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET]; 00090 waitForUWDONE(); 00091 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] = FMBD0; 00092 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET + 1] = SMB; 00093 00094 // send second two bytes 00095 SMB = usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET + 3]; 00096 FMBD0 = usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET + 2]; 00097 waitForUWDONE(); 00098 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET + 2] = FMBD0; 00099 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET + 3] = SMB; 00100 00101 // send last byte 00102 MWM = 0x00; // set 8 bit operation 00103 FMBD0 = usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET + 4]; 00104 waitForUWDONE(); 00105 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET + 4] = FMBD0; 00106 MWM = 0xFF; // set 16 bit operation 00107 00108 // CKCON = 0; // MOVX takes 2 cycles (41.7ns @ 48 MHz) 00109 } 00110 00111 00118 void BDI_555_10() 00119 { 00120 signed char _bit; 00121 00122 #ifdef TIMEOUT_EXCEPTION_ON 00123 exceptionOnTimeoutOn(); 00124 // wait for DSDO to go low 00125 while (DSDO) { 00126 // return if exception packet sent 00127 if (!exceptionOnTimeout) { return; } 00128 } 00129 exceptionOnTimeoutOff(); 00130 #endif 00131 // send/receive the first 8 bits 00132 for (_bit = 7; _bit >= 0; _bit--) { 00133 // read DSDO 00134 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] *= 2; // shift left 00135 if (DSDO) { // DSDO set 00136 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] += 1; 00137 } 00138 // set DSDI 00139 if (usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET] & (1<<_bit)) { // bit set 00140 DSDI = 1; 00141 } else { // bit cleared 00142 DSDI = 0; 00143 } 00144 // clock high 00145 DSCK = 1; 00146 // clock low 00147 DSCK = 0; 00148 } 00149 // send/receive the last 2 bits 00150 for (_bit = 1; _bit >= 0; _bit--) { 00151 // read DSDO 00152 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] *= 2; // shift left 00153 if (DSDO) { // DSDO set 00154 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] += 1; 00155 } 00156 // set DSDI 00157 if (usbOutBuffer[outBufIndex + PACKET_DATA_OFFSET + BDI_10_OFFSET] & (1<<(_bit + 6))) { // bit set 00158 DSDI = 1; 00159 } else { // bit cleared 00160 DSDI = 0; 00161 } 00162 // clock high 00163 DSCK = 1; 00164 // clock low 00165 DSCK = 0; 00166 } 00167 // shift bits (the 2 bits are right alligned -> shift left (msb)) 00168 usbInBuffer[inBufIndex + PACKET_DATA_OFFSET] *= 64; // shift left 00169 }