USB-BDI
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00001 // Copyright (c) 2000 Cypress Semiconductor, All rights reserved 00002 00003 00028 /* 00029 //----------------------------------------------------------------------------- 00030 // File: FX2regs.h 00031 // Contents: EZ-USB FX2 register declarations and bit mask definitions. 00032 // 00033 // $Archive: /USB/Target/Inc/fx2regs.h $ 00034 // $Date: 2003/12/08 03:26:57 $ 00035 // $Revision: 1.4 $ 00036 // 00037 // 00038 // Copyright (c) 2000 Cypress Semiconductor, All rights reserved 00039 //----------------------------------------------------------------------------- 00040 */ 00041 00042 00043 #ifndef FX2REGS_H /* Header Sentry */ 00044 #define FX2REGS_H 00045 00046 /* 00047 //----------------------------------------------------------------------------- 00048 // FX2 Related Register Assignments 00049 //----------------------------------------------------------------------------- 00050 00051 // The Ez-USB FX2 registers are defined here. We use FX2regs.h for register 00052 // address allocation by using "#define ALLOCATE_extern". 00053 // When using "#define ALLOCATE_extern", you get (for instance): 00054 // xdata volatile unsigned char OUT7BUF[64] __at 0x7B40; 00055 // Such lines are created from FX2.h by using the preprocessor. 00056 // Incidently, these lines will not generate any space in the resulting hex 00057 // file; they just bind the symbols to the addresses for compilation. 00058 // You just need to put "#define ALLOCATE_extern" in your main program file; 00059 // i.e. fw.c or a stand-alone C source file. 00060 // Without "#define ALLOCATE_extern", you just get the external reference: 00061 // extern xdata volatile unsigned char OUT7BUF[64] ;// 0x7B40; 00062 // This uses the concatenation operator "##" to insert a comment "//" 00063 // to cut off the end of the line, "__at 0x7B40;", which is not wanted. 00064 */ 00065 00066 00068 __xdata __at (0xE400) volatile unsigned char GPIF_WAVE_DATA[128]; 00070 __xdata __at (0xE480) volatile unsigned char RES_WAVEDATA_END ; 00071 00072 // General Configuration 00074 __xdata __at (0xE600) volatile unsigned char CPUCS ; 00076 __xdata __at (0xE601) volatile unsigned char IFCONFIG ; 00078 __xdata __at (0xE602) volatile unsigned char PINFLAGSAB ; 00080 __xdata __at (0xE603) volatile unsigned char PINFLAGSCD ; 00082 __xdata __at (0xE604) volatile unsigned char FIFORESET ; 00084 __xdata __at (0xE605) volatile unsigned char BREAKPT ; 00086 __xdata __at (0xE606) volatile unsigned char BPADDRH ; 00088 __xdata __at (0xE607) volatile unsigned char BPADDRL ; 00090 __xdata __at (0xE608) volatile unsigned char UART230 ; 00092 __xdata __at (0xE609) volatile unsigned char FIFOPINPOLAR ; 00094 __xdata __at (0xE60A) volatile unsigned char REVID ; 00096 __xdata __at (0xE60B) volatile unsigned char REVCTL ; 00097 00098 // Endpoint Configuration 00100 __xdata __at (0xE610) volatile unsigned char EP1OUTCFG ; 00102 __xdata __at (0xE611) volatile unsigned char EP1INCFG ; 00104 __xdata __at (0xE612) volatile unsigned char EP2CFG ; 00106 __xdata __at (0xE613) volatile unsigned char EP4CFG ; 00108 __xdata __at (0xE614) volatile unsigned char EP6CFG ; 00110 __xdata __at (0xE615) volatile unsigned char EP8CFG ; 00112 __xdata __at (0xE618) volatile unsigned char EP2FIFOCFG ; 00114 __xdata __at (0xE619) volatile unsigned char EP4FIFOCFG ; 00116 __xdata __at (0xE61A) volatile unsigned char EP6FIFOCFG ; 00118 __xdata __at (0xE61B) volatile unsigned char EP8FIFOCFG ; 00120 __xdata __at (0xE620) volatile unsigned char EP2AUTOINLENH ; 00122 __xdata __at (0xE621) volatile unsigned char EP2AUTOINLENL ; 00124 __xdata __at (0xE622) volatile unsigned char EP4AUTOINLENH ; 00126 __xdata __at (0xE623) volatile unsigned char EP4AUTOINLENL ; 00128 __xdata __at (0xE624) volatile unsigned char EP6AUTOINLENH ; 00130 __xdata __at (0xE625) volatile unsigned char EP6AUTOINLENL ; 00132 __xdata __at (0xE626) volatile unsigned char EP8AUTOINLENH ; 00134 __xdata __at (0xE627) volatile unsigned char EP8AUTOINLENL ; 00136 __xdata __at (0xE630) volatile unsigned char EP2FIFOPFH ; 00138 __xdata __at (0xE631) volatile unsigned char EP2FIFOPFL ; 00140 __xdata __at (0xE632) volatile unsigned char EP4FIFOPFH ; 00142 __xdata __at (0xE633) volatile unsigned char EP4FIFOPFL ; 00144 __xdata __at (0xE634) volatile unsigned char EP6FIFOPFH ; 00146 __xdata __at (0xE635) volatile unsigned char EP6FIFOPFL ; 00148 __xdata __at (0xE636) volatile unsigned char EP8FIFOPFH ; 00150 __xdata __at (0xE637) volatile unsigned char EP8FIFOPFL ; 00152 __xdata __at (0xE640) volatile unsigned char EP2ISOINPKTS ; 00154 __xdata __at (0xE641) volatile unsigned char EP4ISOINPKTS ; 00156 __xdata __at (0xE642) volatile unsigned char EP6ISOINPKTS ; 00158 __xdata __at (0xE643) volatile unsigned char EP8ISOINPKTS ; 00160 __xdata __at (0xE648) volatile unsigned char INPKTEND ; 00162 __xdata __at (0xE649) volatile unsigned char OUTPKTEND ; 00163 00164 // Interrupts 00165 00167 __xdata __at (0xE650) volatile unsigned char EP2FIFOIE ; 00169 __xdata __at (0xE651) volatile unsigned char EP2FIFOIRQ ; 00171 __xdata __at (0xE652) volatile unsigned char EP4FIFOIE ; 00173 __xdata __at (0xE653) volatile unsigned char EP4FIFOIRQ ; 00175 __xdata __at (0xE654) volatile unsigned char EP6FIFOIE ; 00177 __xdata __at (0xE655) volatile unsigned char EP6FIFOIRQ ; 00179 __xdata __at (0xE656) volatile unsigned char EP8FIFOIE ; 00181 __xdata __at (0xE657) volatile unsigned char EP8FIFOIRQ ; 00183 __xdata __at (0xE658) volatile unsigned char IBNIE ; 00185 __xdata __at (0xE659) volatile unsigned char IBNIRQ ; 00187 __xdata __at (0xE65A) volatile unsigned char NAKIE ; 00189 __xdata __at (0xE65B) volatile unsigned char NAKIRQ ; 00191 __xdata __at (0xE65C) volatile unsigned char USBIE ; 00193 __xdata __at (0xE65D) volatile unsigned char USBIRQ ; 00195 __xdata __at (0xE65E) volatile unsigned char EPIE ; 00197 __xdata __at (0xE65F) volatile unsigned char EPIRQ ; 00199 __xdata __at (0xE660) volatile unsigned char GPIFIE ; 00201 __xdata __at (0xE661) volatile unsigned char GPIFIRQ ; 00203 __xdata __at (0xE662) volatile unsigned char USBERRIE ; 00205 __xdata __at (0xE663) volatile unsigned char USBERRIRQ ; 00207 __xdata __at (0xE664) volatile unsigned char ERRCNTLIM ; 00209 __xdata __at (0xE665) volatile unsigned char CLRERRCNT ; 00211 __xdata __at (0xE666) volatile unsigned char INT2IVEC ; 00213 __xdata __at (0xE667) volatile unsigned char INT4IVEC ; 00215 __xdata __at (0xE668) volatile unsigned char INTSETUP ; 00216 00217 // Input/Output 00219 __xdata __at (0xE670) volatile unsigned char PORTACFG ; 00221 __xdata __at (0xE671) volatile unsigned char PORTCCFG ; 00223 __xdata __at (0xE672) volatile unsigned char PORTECFG ; 00225 __xdata __at (0xE678) volatile unsigned char I2CS ; 00227 __xdata __at (0xE679) volatile unsigned char I2DAT ; 00229 __xdata __at (0xE67A) volatile unsigned char I2CTL ; 00231 __xdata __at (0xE67B) volatile unsigned char XAUTODAT1 ; 00233 __xdata __at (0xE67C) volatile unsigned char XAUTODAT2 ; 00234 00236 #define EXTAUTODAT1 XAUTODAT1 00237 00238 #define EXTAUTODAT2 XAUTODAT2 00239 00240 // USB Control 00242 __xdata __at (0xE680) volatile unsigned char USBCS ; 00244 __xdata __at (0xE681) volatile unsigned char SUSPEND ; 00246 __xdata __at (0xE682) volatile unsigned char WAKEUPCS ; 00248 __xdata __at (0xE683) volatile unsigned char TOGCTL ; 00250 __xdata __at (0xE684) volatile unsigned char USBFRAMEH ; 00252 __xdata __at (0xE685) volatile unsigned char USBFRAMEL ; 00254 __xdata __at (0xE686) volatile unsigned char MICROFRAME ; 00256 __xdata __at (0xE687) volatile unsigned char FNADDR ; 00257 00258 // Endpoints 00259 00261 __xdata __at (0xE68A) volatile unsigned char EP0BCH ; 00263 __xdata __at (0xE68B) volatile unsigned char EP0BCL ; 00265 __xdata __at (0xE68D) volatile unsigned char EP1OUTBC ; 00267 __xdata __at (0xE68F) volatile unsigned char EP1INBC ; 00269 __xdata __at (0xE690) volatile unsigned char EP2BCH ; 00271 __xdata __at (0xE691) volatile unsigned char EP2BCL ; 00273 __xdata __at (0xE694) volatile unsigned char EP4BCH ; 00275 __xdata __at (0xE695) volatile unsigned char EP4BCL ; 00277 __xdata __at (0xE698) volatile unsigned char EP6BCH ; 00279 __xdata __at (0xE699) volatile unsigned char EP6BCL ; 00281 __xdata __at (0xE69C) volatile unsigned char EP8BCH ; 00283 __xdata __at (0xE69D) volatile unsigned char EP8BCL ; 00285 __xdata __at (0xE6A0) volatile unsigned char EP0CS ; 00287 __xdata __at (0xE6A1) volatile unsigned char EP1OUTCS ; 00289 __xdata __at (0xE6A2) volatile unsigned char EP1INCS ; 00291 __xdata __at (0xE6A3) volatile unsigned char EP2CS ; 00293 __xdata __at (0xE6A4) volatile unsigned char EP4CS ; 00295 __xdata __at (0xE6A5) volatile unsigned char EP6CS ; 00297 __xdata __at (0xE6A6) volatile unsigned char EP8CS ; 00299 __xdata __at (0xE6A7) volatile unsigned char EP2FIFOFLGS ; 00301 __xdata __at (0xE6A8) volatile unsigned char EP4FIFOFLGS ; 00303 __xdata __at (0xE6A9) volatile unsigned char EP6FIFOFLGS ; 00305 __xdata __at (0xE6AA) volatile unsigned char EP8FIFOFLGS ; 00307 __xdata __at (0xE6AB) volatile unsigned char EP2FIFOBCH ; 00309 __xdata __at (0xE6AC) volatile unsigned char EP2FIFOBCL ; 00311 __xdata __at (0xE6AD) volatile unsigned char EP4FIFOBCH ; 00313 __xdata __at (0xE6AE) volatile unsigned char EP4FIFOBCL ; 00315 __xdata __at (0xE6AF) volatile unsigned char EP6FIFOBCH ; 00317 __xdata __at (0xE6B0) volatile unsigned char EP6FIFOBCL ; 00319 __xdata __at (0xE6B1) volatile unsigned char EP8FIFOBCH ; 00321 __xdata __at (0xE6B2) volatile unsigned char EP8FIFOBCL ; 00323 __xdata __at (0xE6B3) volatile unsigned char SUDPTRH ; 00325 __xdata __at (0xE6B4) volatile unsigned char SUDPTRL ; 00327 __xdata __at (0xE6B5) volatile unsigned char SUDPTRCTL ; 00329 __xdata __at (0xE6B8) volatile unsigned char SETUPDAT[8] ; 00330 00331 // GPIF 00332 00334 __xdata __at (0xE6C0) volatile unsigned char GPIFWFSELECT ; 00336 __xdata __at (0xE6C1) volatile unsigned char GPIFIDLECS ; 00338 __xdata __at (0xE6C2) volatile unsigned char GPIFIDLECTL ; 00340 __xdata __at (0xE6C3) volatile unsigned char GPIFCTLCFG ; 00342 __xdata __at (0xE6C4) volatile unsigned char GPIFADRH ; 00344 __xdata __at (0xE6C5) volatile unsigned char GPIFADRL ; 00345 00347 __xdata __at (0xE6CE) volatile unsigned char GPIFTCB3 ; 00349 __xdata __at (0xE6CF) volatile unsigned char GPIFTCB2 ; 00351 __xdata __at (0xE6D0) volatile unsigned char GPIFTCB1 ; 00353 __xdata __at (0xE6D1) volatile unsigned char GPIFTCB0 ; 00354 00356 #define EP2GPIFTCH GPIFTCB1 00357 00358 #define EP2GPIFTCL GPIFTCB0 00359 00360 #define EP4GPIFTCH GPIFTCB1 00361 00362 #define EP4GPIFTCL GPIFTCB0 00363 00364 #define EP6GPIFTCH GPIFTCB1 00365 00366 #define EP6GPIFTCL GPIFTCB0 00367 00368 #define EP8GPIFTCH GPIFTCB1 00369 00370 #define EP8GPIFTCL GPIFTCB0 00371 00372 // extern __xdata volatile unsigned char EP2GPIFTCH __at 0xE6D0; /** EP2 GPIF Transaction Count High */ 00373 // extern __xdata volatile unsigned char EP2GPIFTCL __at 0xE6D1; /** EP2 GPIF Transaction Count Low */ 00375 __xdata __at (0xE6D2) volatile unsigned char EP2GPIFFLGSEL ; 00377 __xdata __at (0xE6D3) volatile unsigned char EP2GPIFPFSTOP ; 00379 __xdata __at (0xE6D4) volatile unsigned char EP2GPIFTRIG ; 00380 00381 // extern __xdata volatile unsigned char EP4GPIFTCH __at 0xE6D8; /** EP4 GPIF Transaction Count High */ 00382 // extern __xdata volatile unsigned char EP4GPIFTCL __at 0xE6D9; /** EP4 GPIF Transactionr Count Low */ 00384 __xdata __at (0xE6DA) volatile unsigned char EP4GPIFFLGSEL ; 00386 __xdata __at (0xE6DB) volatile unsigned char EP4GPIFPFSTOP ; 00388 __xdata __at (0xE6DC) volatile unsigned char EP4GPIFTRIG ; 00389 00390 // extern __xdata volatile unsigned char EP6GPIFTCH __at 0xE6E0; /** EP6 GPIF Transaction Count High */ 00391 // extern __xdata volatile unsigned char EP6GPIFTCL __at 0xE6E1; /** EP6 GPIF Transaction Count Low */ 00393 __xdata __at (0xE6E2) volatile unsigned char EP6GPIFFLGSEL ; 00395 __xdata __at (0xE6E3) volatile unsigned char EP6GPIFPFSTOP ; 00397 __xdata __at (0xE6E4) volatile unsigned char EP6GPIFTRIG ; 00398 00399 // extern __xdata volatile unsigned char EP8GPIFTCH __at 0xE6E8; /** EP8 GPIF Transaction Count High */ 00400 // extern __xdata volatile unsigned char EP8GPIFTCL __at 0xE6E9; /** EP8GPIF Transaction Count Low */ 00402 __xdata __at (0xE6EA) volatile unsigned char EP8GPIFFLGSEL ; 00404 __xdata __at (0xE6EB) volatile unsigned char EP8GPIFPFSTOP ; 00406 __xdata __at (0xE6EC) volatile unsigned char EP8GPIFTRIG ; 00408 __xdata __at (0xE6F0) volatile unsigned char XGPIFSGLDATH ; 00410 __xdata __at (0xE6F1) volatile unsigned char XGPIFSGLDATLX ; 00412 __xdata __at (0xE6F2) volatile unsigned char XGPIFSGLDATLNOX ; 00414 __xdata __at (0xE6F3) volatile unsigned char GPIFREADYCFG ; 00416 __xdata __at (0xE6F4) volatile unsigned char GPIFREADYSTAT ; 00418 __xdata __at (0xE6F5) volatile unsigned char GPIFABORT ; 00419 00420 // UDMA 00422 __xdata __at (0xE6C6) volatile unsigned char FLOWSTATE ; 00424 __xdata __at (0xE6C7) volatile unsigned char FLOWLOGIC ; 00426 __xdata __at (0xE6C8) volatile unsigned char FLOWEQ0CTL ; 00428 __xdata __at (0xE6C9) volatile unsigned char FLOWEQ1CTL ; 00430 __xdata __at (0xE6CA) volatile unsigned char FLOWHOLDOFF ; 00432 __xdata __at (0xE6CB) volatile unsigned char FLOWSTB ; 00434 __xdata __at (0xE6CC) volatile unsigned char FLOWSTBEDGE ; 00436 __xdata __at (0xE6CD) volatile unsigned char FLOWSTBHPERIOD ; 00438 __xdata __at (0xE60C) volatile unsigned char GPIFHOLDAMOUNT ; 00440 __xdata __at (0xE67D) volatile unsigned char UDMACRCH ; 00442 __xdata __at (0xE67E) volatile unsigned char UDMACRCL ; 00444 __xdata __at (0xE67F) volatile unsigned char UDMACRCQUAL ; 00445 00446 // Debug/Test 00448 __xdata __at (0xE6F8) volatile unsigned char DBUG ; 00450 __xdata __at (0xE6F9) volatile unsigned char TESTCFG ; 00452 __xdata __at (0xE6FA) volatile unsigned char USBTEST ; 00454 __xdata __at (0xE6FB) volatile unsigned char CT1 ; 00456 __xdata __at (0xE6FC) volatile unsigned char CT2 ; 00458 __xdata __at (0xE6FD) volatile unsigned char CT3 ; 00460 __xdata __at (0xE6FE) volatile unsigned char CT4 ; 00461 00462 // Endpoint Buffers 00464 __xdata __at (0xE740) volatile unsigned char EP0BUF[64] ; 00466 __xdata __at (0xE780) volatile unsigned char EP1OUTBUF[64] ; 00468 __xdata __at (0xE7C0) volatile unsigned char EP1INBUF[64] ; 00470 __xdata __at (0xF000) volatile unsigned char EP2FIFOBUF[1024] ; 00472 __xdata __at (0xF400) volatile unsigned char EP4FIFOBUF[1024] ; 00474 __xdata __at (0xF800) volatile unsigned char EP6FIFOBUF[1024] ; 00476 __xdata __at (0xFC00) volatile unsigned char EP8FIFOBUF[1024] ; 00477 00478 00479 00480 /*----------------------------------------------------------------------------- 00481 Special Function Registers (SFRs) 00482 The unsigned char registers and bits defined in the following list are based 00483 on the Synopsis definition of the 8051 Special Function Registers for EZ-USB. 00484 If you modify the register definitions below, please regenerate the file 00485 "ezregs.inc" which includes the same basic information for assembly inclusion. 00486 -----------------------------------------------------------------------------*/ 00488 __sfr __at 0x80 IOA; 00489 00490 __sfr __at 0x81 SP; 00491 00492 __sfr __at 0x82 DPL; 00493 00494 __sfr __at 0x83 DPH; 00495 00496 __sfr __at 0x84 DPL1; 00497 00498 __sfr __at 0x85 DPH1; 00499 00500 __sfr __at 0x86 DPS; 00501 00502 /* DPS */ 00503 00504 __sbit __at 0x86+0 SEL; 00505 00506 __sfr __at 0x87 PCON; /* PCON */ 00507 //__sbit IDLE = 0x87+0; 00508 //__sbit STOP = 0x87+1; 00509 //__sbit GF0 = 0x87+2; 00510 //__sbit GF1 = 0x87+3; 00511 //__sbit SMOD0 = 0x87+7; 00512 00513 __sfr __at 0x88 TCON; 00514 /* TCON */ 00515 __sbit __at 0x88+0 IT0; 00516 __sbit __at 0x88+1 IE0; 00517 __sbit __at 0x88+2 IT1; 00518 __sbit __at 0x88+3 IE1; 00519 __sbit __at 0x88+4 TR0; 00520 __sbit __at 0x88+5 TF0; 00521 __sbit __at 0x88+6 TR1; 00522 __sbit __at 0x88+7 TF1; 00523 00524 __sfr __at 0x89 TMOD; 00525 /* TMOD */ 00526 //__sbit M00 = 0x89+0; 00527 //__sbit M10 = 0x89+1; 00528 //__sbit CT0 = 0x89+2; 00529 //__sbit GATE0 = 0x89+3; 00530 //__sbit M01 = 0x89+4; 00531 //__sbit M11 = 0x89+5; 00532 //__sbit CT1 = 0x89+6; 00533 //__sbit GATE1 = 0x89+7; 00534 00535 __sfr __at 0x8A TL0; 00536 00537 __sfr __at 0x8B TL1; 00538 00539 __sfr __at 0x8C TH0; 00540 00541 __sfr __at 0x8D TH1; 00542 00543 __sfr __at 0x8E CKCON; 00544 /* CKCON */ 00545 //__sbit MD0 = 0x89+0; 00546 //__sbit MD1 = 0x89+1; 00547 //__sbit MD2 = 0x89+2; 00548 //__sbit T0M = 0x89+3; 00549 //__sbit T1M = 0x89+4; 00550 //__sbit T2M = 0x89+5; 00551 // __sfr __at 0x8F SPC_FNC; // Was WRS in Reg320 00552 /* CKCON */ 00553 //__sbit WRS = 0x8F+0; 00554 00555 __sfr __at 0x90 IOB; 00556 00557 __sfr __at 0x91 EXIF; // EXIF Bit Values differ from Reg320 00558 /* EXIF */ 00559 //__sbit USBINT = 0x91+4; 00560 //__sbit I2CINT = 0x91+5; 00561 //__sbit IE4 = 0x91+6; 00562 //__sbit IE5 = 0x91+7; 00563 __sfr __at 0x92 MPAGE; 00564 00565 __sfr __at 0x98 SCON0; 00566 /* SCON0 */ 00567 __sbit __at 0x98+0 RI; 00568 __sbit __at 0x98+1 TI; 00569 __sbit __at 0x98+2 RB8; 00570 __sbit __at 0x98+3 TB8; 00571 __sbit __at 0x98+4 REN; 00572 __sbit __at 0x98+5 SM2; 00573 __sbit __at 0x98+6 SM1; 00574 __sbit __at 0x98+7 SM0; 00575 00576 __sfr __at 0x99 SBUF0; 00577 00578 __sfr __at 0x9A APTR1H; 00579 00580 __sfr __at 0x9B APTR1L; 00581 00582 __sfr __at 0x9C AUTODAT1; 00583 00584 __sfr __at 0x9D AUTOPTRH2; 00585 00586 __sfr __at 0x9E AUTOPTRL2; 00587 00588 __sfr __at 0x9F AUTODAT2; 00589 00590 __sfr __at 0xA0 IOC; 00591 00592 __sfr __at 0xA1 INT2CLR; 00593 00594 __sfr __at 0xA2 INT4CLR; 00595 00596 #define AUTOPTRH1 APTR1H 00597 #define AUTOPTRL1 APTR1L 00598 00599 __sfr __at 0xA8 IE; 00600 /* IE */ 00601 __sbit __at 0xA8+0 EX0; 00602 __sbit __at 0xA8+1 ET0; 00603 __sbit __at 0xA8+2 EX1; 00604 __sbit __at 0xA8+3 ET1; 00605 __sbit __at 0xA8+4 ES0; 00606 __sbit __at 0xA8+5 ET2; 00607 __sbit __at 0xA8+6 ES1; 00608 __sbit __at 0xA8+7 EA; 00609 00610 __sfr __at 0xAA EP2468STAT; 00611 /* EP2468STAT */ 00612 //__sbit EP2E = 0xAA+0; 00613 //__sbit EP2F = 0xAA+1; 00614 //__sbit EP4E = 0xAA+2; 00615 //__sbit EP4F = 0xAA+3; 00616 //__sbit EP6E = 0xAA+4; 00617 //__sbit EP6F = 0xAA+5; 00618 //__sbit EP8E = 0xAA+6; 00619 //__sbit EP8F = 0xAA+7; 00620 00621 __sfr __at 0xAB EP24FIFOFLGS; 00622 00623 __sfr __at 0xAC EP68FIFOFLGS; 00624 00625 __sfr __at 0xAF AUTOPTRSETUP;/* AUTOPTRSETUP */ 00626 // __sbit EXTACC = 0xAF+0; 00627 // __sbit APTR1FZ = 0xAF+1; 00628 // __sbit APTR2FZ = 0xAF+2; 00629 00630 __sfr __at 0xB0 IOD; 00631 00632 __sfr __at 0xB1 IOE; 00633 00634 __sfr __at 0xB2 OEA; 00635 00636 __sfr __at 0xB3 OEB; 00637 00638 __sfr __at 0xB4 OEC; 00639 00640 __sfr __at 0xB5 OED; 00641 00642 __sfr __at 0xB6 OEE; 00643 00644 __sfr __at 0xB8 IP; 00645 /* IP */ 00646 __sbit __at 0xB8+0 PX0; 00647 __sbit __at 0xB8+1 PT0; 00648 __sbit __at 0xB8+2 PX1; 00649 __sbit __at 0xB8+3 PT1; 00650 __sbit __at 0xB8+4 PS0; 00651 __sbit __at 0xB8+5 PT2; 00652 __sbit __at 0xB8+6 PS1; 00653 00654 00655 __sfr __at 0xBA EP01STAT; 00656 00657 __sfr __at 0xBB GPIFTRIG; 00658 00659 __sfr __at 0xBD GPIFSGLDATH; 00660 00661 __sfr __at 0xBE GPIFSGLDATLX; 00662 00663 __sfr __at 0xBF GPIFSGLDATLNOX; 00664 00665 __sfr __at 0xC0 SCON1; 00666 /* SCON1 */ 00667 __sbit __at 0xC0+0 RI1; 00668 __sbit __at 0xC0+1 TI1; 00669 __sbit __at 0xC0+2 RB81; 00670 __sbit __at 0xC0+3 TB81; 00671 __sbit __at 0xC0+4 REN1; 00672 __sbit __at 0xC0+5 SM21; 00673 __sbit __at 0xC0+6 SM11; 00674 __sbit __at 0xC0+7 SM01; 00675 00676 __sfr __at 0xC1 SBUF1; 00677 00678 __sfr __at 0xC8 T2CON; 00679 /* T2CON */ 00680 __sbit __at 0xC8+0 CP_RL2; 00681 __sbit __at 0xC8+1 C_T2; 00682 __sbit __at 0xC8+2 TR2; 00683 __sbit __at 0xC8+3 EXEN2; 00684 __sbit __at 0xC8+4 TCLK; 00685 __sbit __at 0xC8+5 RCLK; 00686 __sbit __at 0xC8+6 EXF2; 00687 __sbit __at 0xC8+7 TF2; 00688 00689 __sfr __at 0xCA RCAP2L; 00690 00691 __sfr __at 0xCB RCAP2H; 00692 00693 __sfr __at 0xCC TL2; 00694 00695 __sfr __at 0xCD TH2; 00696 00697 __sfr __at 0xD0 PSW; 00698 /* PSW */ 00699 __sbit __at 0xD0+0 P; 00700 __sbit __at 0xD0+1 FL; 00701 __sbit __at 0xD0+2 OV; 00702 __sbit __at 0xD0+3 RS0; 00703 __sbit __at 0xD0+4 RS1; 00704 __sbit __at 0xD0+5 F0; 00705 __sbit __at 0xD0+6 AC; 00706 __sbit __at 0xD0+7 CY; 00707 00708 __sfr __at 0xD8 EICON; // Was WDCON in DS80C320 EICON; Bit Values differ from Reg320 00709 /* EICON */ 00710 __sbit __at 0xD8+3 INT6; 00711 __sbit __at 0xD8+4 RESI; 00712 __sbit __at 0xD8+5 ERESI; 00713 __sbit __at 0xD8+7 SMOD1; 00714 00715 __sfr __at 0xE0 ACC; 00716 00717 __sfr __at 0xE8 EIE; // EIE Bit Values differ from Reg320 00718 /* EIE */ 00719 __sbit __at 0xE8+0 EIUSB; 00720 __sbit __at 0xE8+1 EI2C; 00721 __sbit __at 0xE8+2 EIEX4; 00722 __sbit __at 0xE8+3 EIEX5; 00723 __sbit __at 0xE8+4 EIEX6; 00724 00725 __sfr __at 0xF0 B; 00726 00727 __sfr __at 0xF8 EIP; // EIP Bit Values differ from Reg320 00728 /* EIP */ 00729 __sbit __at 0xF8+0 PUSB; 00730 __sbit __at 0xF8+1 PI2C; 00731 __sbit __at 0xF8+2 EIPX4; 00732 __sbit __at 0xF8+3 EIPX5; 00733 __sbit __at 0xF8+4 EIPX6; 00734 00735 /*----------------------------------------------------------------------------- 00736 Bit Masks 00737 -----------------------------------------------------------------------------*/ 00738 00739 #define bmBIT0 1 00740 00741 #define bmBIT1 2 00742 00743 #define bmBIT2 4 00744 00745 #define bmBIT3 8 00746 00747 #define bmBIT4 16 00748 00749 #define bmBIT5 32 00750 00751 #define bmBIT6 64 00752 00753 #define bmBIT7 128 00754 00755 /* CPU Control & Status Register (CPUCS) */ 00756 00757 #define bmPRTCSTB bmBIT5 00758 00759 #define bmCLKSPD (bmBIT4 | bmBIT3) 00760 00761 #define bmCLKSPD1 bmBIT4 00762 #define bmCLKSPD0 bmBIT3 00763 #define bmCLKINV bmBIT2 00764 #define bmCLKOE bmBIT1 00765 #define bm8051RES bmBIT0 00766 /* Port Alternate Configuration Registers */ 00767 /* Port A (PORTACFG) */ 00768 #define bmFLAGD bmBIT7 00769 #define bmINT1 bmBIT1 00770 #define bmINT0 bmBIT0 00771 /* Port C (PORTCCFG) */ 00772 #define bmGPIFA7 bmBIT7 00773 #define bmGPIFA6 bmBIT6 00774 #define bmGPIFA5 bmBIT5 00775 #define bmGPIFA4 bmBIT4 00776 #define bmGPIFA3 bmBIT3 00777 #define bmGPIFA2 bmBIT2 00778 #define bmGPIFA1 bmBIT1 00779 #define bmGPIFA0 bmBIT0 00780 /* Port E (PORTECFG) */ 00781 #define bmGPIFA8 bmBIT7 00782 #define bmT2EX bmBIT6 00783 #define bmINT6 bmBIT5 00784 #define bmRXD1OUT bmBIT4 00785 #define bmRXD0OUT bmBIT3 00786 #define bmT2OUT bmBIT2 00787 #define bmT1OUT bmBIT1 00788 #define bmT0OUT bmBIT0 00789 00790 /* I2C Control & Status Register (I2CS) */ 00791 #define bmSTART bmBIT7 00792 #define bmSTOP bmBIT6 00793 #define bmLASTRD bmBIT5 00794 #define bmID (bmBIT4 | bmBIT3) 00795 #define bmBERR bmBIT2 00796 #define bmACK bmBIT1 00797 #define bmDONE bmBIT0 00798 /* I2C Control Register (I2CTL) */ 00799 #define bmSTOPIE bmBIT1 00800 #define bm400KHZ bmBIT0 00801 /* Interrupt 2 (USB) Autovector Register (INT2IVEC) */ 00802 #define bmIV4 bmBIT6 00803 #define bmIV3 bmBIT5 00804 #define bmIV2 bmBIT4 00805 #define bmIV1 bmBIT3 00806 #define bmIV0 bmBIT2 00807 /* USB Interrupt Request & Enable Registers (USBIE/USBIRQ) */ 00808 #define bmEP0ACK bmBIT6 00809 #define bmHSGRANT bmBIT5 00810 #define bmURES bmBIT4 00811 #define bmSUSP bmBIT3 00812 #define bmSUTOK bmBIT2 00813 #define bmSOF bmBIT1 00814 #define bmSUDAV bmBIT0 00815 /* Breakpoint register (BREAKPT) */ 00816 #define bmBREAK bmBIT3 00817 #define bmBPPULSE bmBIT2 00818 #define bmBPEN bmBIT1 00819 /* Interrupt 2 & 4 Setup (INTSETUP) */ 00820 #define bmAV2EN bmBIT3 00821 #define bmINT4IN bmBIT1 00822 #define bmAV4EN bmBIT0 00823 /* USB Control & Status Register (USBCS) */ 00824 #define bmHSM bmBIT7 00825 #define bmDISCON bmBIT3 00826 #define bmNOSYNSOF bmBIT2 00827 #define bmRENUM bmBIT1 00828 #define bmSIGRESUME bmBIT0 00829 /* Wakeup Control and Status Register (WAKEUPCS) */ 00830 #define bmWU2 bmBIT7 00831 #define bmWU bmBIT6 00832 #define bmWU2POL bmBIT5 00833 #define bmWUPOL bmBIT4 00834 #define bmDPEN bmBIT2 00835 #define bmWU2EN bmBIT1 00836 #define bmWUEN bmBIT0 00837 /* End Point 0 Control & Status Register (EP0CS) */ 00838 #define bmHSNAK bmBIT7 00839 /* End Point 0-1 Control & Status Registers (EP0CS/EP1OUTCS/EP1INCS) */ 00840 #define bmEPBUSY bmBIT1 00841 #define bmEPSTALL bmBIT0 00842 /* End Point 2-8 Control & Status Registers (EP2CS/EP4CS/EP6CS/EP8CS) */ 00843 #define bmNPAK (bmBIT6 | bmBIT5 | bmBIT4) 00844 #define bmEPFULL bmBIT3 00845 #define bmEPEMPTY bmBIT2 00846 /* Endpoint Status (EP2468STAT) SFR bits */ 00847 #define bmEP8FULL bmBIT7 00848 #define bmEP8EMPTY bmBIT6 00849 #define bmEP6FULL bmBIT5 00850 #define bmEP6EMPTY bmBIT4 00851 #define bmEP4FULL bmBIT3 00852 #define bmEP4EMPTY bmBIT2 00853 #define bmEP2FULL bmBIT1 00854 #define bmEP2EMPTY bmBIT0 00855 /* SETUP Data Pointer Auto Mode (SUDPTRCTL) */ 00856 #define bmSDPAUTO bmBIT0 00857 /* Endpoint Data Toggle Control (TOGCTL) */ 00858 #define bmQUERYTOGGLE bmBIT7 00859 #define bmSETTOGGLE bmBIT6 00860 #define bmRESETTOGGLE bmBIT5 00861 #define bmTOGCTLEPMASK bmBIT3 | bmBIT2 | bmBIT1 | bmBIT0 00862 /* IBN (In Bulk Nak) enable and request bits (IBNIE/IBNIRQ) */ 00863 #define bmEP8IBN bmBIT5 00864 #define bmEP6IBN bmBIT4 00865 #define bmEP4IBN bmBIT3 00866 #define bmEP2IBN bmBIT2 00867 #define bmEP1IBN bmBIT1 00868 #define bmEP0IBN bmBIT0 00869 00870 /* PING-NAK enable and request bits (NAKIE/NAKIRQ) */ 00871 #define bmEP8PING bmBIT7 00872 #define bmEP6PING bmBIT6 00873 #define bmEP4PING bmBIT5 00874 #define bmEP2PING bmBIT4 00875 #define bmEP1PING bmBIT3 00876 #define bmEP0PING bmBIT2 00877 #define bmIBN bmBIT0 00878 00879 /* Interface Configuration bits (IFCONFIG) */ 00880 #define bmIFCLKSRC bmBIT7 // set == INTERNAL 00881 #define bm3048MHZ bmBIT6 // set == 48 MHz 00882 #define bmIFCLKOE bmBIT5 00883 #define bmIFCLKPOL bmBIT4 00884 #define bmASYNC bmBIT3 00885 #define bmGSTATE bmBIT2 00886 #define bmIFCFG1 bmBIT1 00887 #define bmIFCFG0 bmBIT0 00888 #define bmIFCFGMASK (bmIFCFG0 | bmIFCFG1) 00889 #define bmIFGPIF bmIFCFG1 00890 00891 /* EP 2468 FIFO Configuration bits (EP2FIFOCFG,EP4FIFOCFG,EP6FIFOCFG,EP8FIFOCFG) */ 00892 #define bmINFM bmBIT6 00893 #define bmOEP bmBIT5 00894 #define bmAUTOOUT bmBIT4 00895 #define bmAUTOIN bmBIT3 00896 #define bmZEROLENIN bmBIT2 00897 // must be zero bmBIT1 00898 #define bmWORDWIDE bmBIT0 00899 00900 /* 00901 * Chip Revision Control Bits (REVCTL) - used to ebable/disable revision specific features 00902 */ 00903 #define bmNOAUTOARM bmBIT1 // these don't match the docs 00904 #define bmSKIPCOMMIT bmBIT0 // these don't match the docs 00905 00906 #define bmDYN_OUT bmBIT1 // these do... 00907 #define bmENH_PKT bmBIT0 00908 00909 00910 /* Fifo Reset bits (FIFORESET) */ 00911 #define bmNAKALL bmBIT7 00912 00913 /* Endpoint Configuration (EPxCFG) */ 00914 #define bmVALID bmBIT7 00915 #define bmIN bmBIT6 00916 #define bmTYPE1 bmBIT5 00917 #define bmTYPE0 bmBIT4 00918 #define bmISOCHRONOUS bmTYPE0 00919 #define bmBULK bmTYPE1 00920 #define bmINTERRUPT (bmTYPE1 | bmTYPE0) 00921 #define bm1KBUF bmBIT3 00922 #define bmBUF1 bmBIT1 00923 #define bmBUF0 bmBIT0 00924 #define bmQUADBUF 0 00925 #define bmINVALIDBUF bmBUF0 00926 #define bmDOUBLEBUF bmBUF1 00927 #define bmTRIPLEBUF (bmBUF1 | bmBUF0) 00928 00929 /* OUTPKTEND */ 00930 #define bmSKIP bmBIT7 // low 4 bits specify which end point 00931 00932 /* GPIFTRIG defs */ 00933 #define bmGPIF_IDLE bmBIT7 // status bit 00934 00935 #define bmGPIF_EP2_START 0 00936 #define bmGPIF_EP4_START 1 00937 #define bmGPIF_EP6_START 2 00938 #define bmGPIF_EP8_START 3 00939 #define bmGPIF_READ bmBIT2 00940 #define bmGPIF_WRITE 0 00941 00942 /* EXIF bits */ 00943 #define bmEXIF_USBINT bmBIT4 00944 #define bmEXIF_I2CINT bmBIT5 00945 #define bmEXIF_IE4 bmBIT6 00946 #define bmEXIF_IE5 bmBIT7 00947 00948 00949 #endif /* FX2REGS_H */