====== Olimex MSP430-H149 Headerboard ======
{{  .:olimex_msp430-h149.jpg?nolink|Olimex MSP430-H149 Headerboard}}
Das MSP430-H149 ist eine Headerboard der Firma Olimex.

===== Eigenschaften =====
  * MSP430F149 Mikroprozessor mit 60KB Programm Flash, 256 Bytes Data Flash und 2KB RAM
  * JTAG Stecker
  * 4 Stiftleisten auf die jeder μP-Pin ausgeführt sind
  * 32.768 KHz Oszilator
  * Pull-Up-Widerstand am RST/NMI Pin
  * Stromversorgung über JTAG oder Stiftleisten
  * Abmessungen: 48 x 48 mm

===== Schema =====
{{.:olimex_msp430-h149_sch.gif?400px&direct|Schema zum Olimex MSP430-H149 Headerboard}}

===== Pinbelegung =====
==== Stiftleisten ====
^ Pin ^ Signal         ^ 1. Funktion  ^ 2. Funktion ^
|   1 | DVCC           | Versorgung ||
|   2 | P6.3/A3        |  |  |
|   3 | P6.4/A4        |  |  |
|   4 | P6.5/A5        |  |  |
|   5 | P6.6/A6        |  |  |
|   6 | P6.7/A7        |  |  |
|   7 | VREF+          |  |  |
|   8 | XIN            |  |  |
|   9 | XOUT           |  |  |
|  10 | VeREF+         |  |  |
|  11 | VREF-/VeREF-   |  |  |
|  12 | P1.0/TACLK     |  |  |
|  13 | P1.1/TA0       |  |  |
|  14 | P1.2/TA1       |  |  |
|  15 | P1.3/TA2       |  |  |
|  16 | P1.4/SMCLK     |  |  |
|  17 | P1.5/TA0       |  |  |
|  18 | P1.6/TA1       |  |  |
|  19 | P1.7/TA2       |  |  |
|  20 | P2.0/ACLK      |  |  |
|  21 | P2.1/TAINCLK   |  |  |
|  22 | P2.2/CAOUT/TA0 |  |  |
|  23 | P2.3/CA0/TA1   |  |  |
|  24 | P2.4/CA1/TA2   |  |  |
|  25 | P2.5/Rosc      |  |  |
|  26 | P2.6/ADC12CLK  |  |  |
|  27 | P2.7/TA0       |  |  |
|  28 | P3.0/STE0      |  |  |
|  29 | P3.1/SIMO0     |  |  |
|  30 | P3.2/SOMI0     |  |  |
|  31 | P3.3/UCLK0     |  |  |
|  32 | P3.4/UTXD0     |  |  |
|  33 | P3.5/URXD0     |  |  |
|  34 | P3.6/UTXD1     |  |  |
|  35 | P3.7/URXD1     |  |  |
|  36 | P4.0/TB0       |  |  |
|  37 | P4.1/TB1       |  |  |
|  38 | P4.2/TB2       |  |  |
|  39 | P4.3/TB3       |  |  |
|  40 | P4.4/TB4       |  |  |
|  41 | P4.5/TB5       |  |  |
|  42 | P4.6/TB6       |  |  |
|  43 | P4.7/TBCLK     |  |  |
|  44 | P5.0/STE1      |  |  |
|  45 | P5.1/SIMO1     |  |  |
|  46 | P5.2/SOMI1     |  |  |
|  47 | P5.3/UCLK1     |  |  |
|  48 | P5.4/MCLK      |  |  |
|  49 | P5.5/SMCLK     |  |  |
|  50 | P5.6/ACLK      |  |  |
|  51 | P5.7/TBOUTH    |  |  |
|  52 | XT2OUT         |  |  |
|  53 | XT2IN          |  |  |
|  54 | TDO/TDI        |  |  |
|  55 | TDI/TCLK       |  |  |
|  56 | TMS            |  |  |
|  57 | TCK            |  |  |
|  58 | !RST/NMI       |  |  |
|  59 | P6.0/A0        |  |  |
|  60 | P6.1/A1        |  |  |
|  61 | P6.2/A2        |  |  |
|  62 | AVSS           |  |  |
|  63 | DVSS           |  |  |
|  64 | AVCC           |  |  |

==== JTAG Stecker ====
^ Pin ^ Signal   ^ Beschreibung                                   ^
|   1 | TDO      | Testdaten Eingang (Test Data Output)           |
|   2 | VCC_IN   | Speisung (Eingang)                             |
|   3 | TDI      | Testdaten Eingang (Test Data Input)            |
|   4 | VCC_OUT  | Speisung (Ausgang)                             |
|   5 | TMS      | Testmodus Wahleingang (Test Mode Select Input) |
|   6 | NC       | Nicht verbunden                                |
|   7 | TCK      | Taktsignal                                     |
|   8 | TEST/VPP | FIXME                                          |
|   9 | GND      | Masse                                          |
|  10 | NC       | Nicht verbunden                                |
|  11 | RST/MNE  | Reset                                          |
|  12 | NC       | Nicht verbunden                                |
|  13 | NC       | Nicht verbunden                                |
|  14 | NC       | Nicht verbunden                                |