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embedded_systems:dsp56002:start [2010-06-21 11:13] zueger1embedded_systems:dsp56002:start [Unbekanntes Datum] (aktuell) – gelöscht - Externe Bearbeitung (Unbekanntes Datum) 127.0.0.1
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-====== Motorola DSP56002 ====== 
- 
-===== Eigenschaften gemäss Datenblatt ===== 
-TODO Übersetzen 
-  * Digital Signal Processing Core 
-  * Efficient, object code compatible, 24-bit 56000 family DSP engine 
-  * Up to 33 Million Instructions Per Second (MIPS) 
-  * 30.3 ns instruction cycle at 66 MHz 
-  * Up to 198 Million Operations Per Second (MOPS) at 66 MHz 
-  * Performs a 1024-point complex Fast Fourier Transform (FFT) in 59,898 clocks 
-  * Highly parallel instruction set with unique DSP addressing modes 
-  * Two 56-bit accumulators including extension byte 
-  * Parallel 24 x 24-bit multiply-accumulate in 1 instruction cycle (2 clock cycles) 
-  * Double precision 48 x 48-bit multiply with 96-bit result in 6 instruction cycles 
-  * 56-bit addition/subtraction in 1 instruction cycle 
-  * Fractional and integer arithmetic with support for multiprecision arithmetic 
-  * Hardware support for block-floating point FFT-hardware nested DO loops 
-  * Zero-overhead fast interrupts (2 instruction cycles) 
-  * Four 24-bit internal data buses and three 16-bit internal address buses for maximum information transfer on-chip 
-  * On-chip Harvard architecture permitting simultaneous accesses to program and two data memories 
-  * 512 x 24-bit on-chip Program RAM and 64 x 24-bit bootstrap ROM 
-  * Two 256 x 24-bit on-chip data RAMs 
-  * Two 256 x 24-bit on-chip data ROMs containing sine, A-law and µ-law tables 
-  * External memory expansion with 16-bit address and 24-bit data buses 
-  * Bootstrap loading from external data bus, Host Interface, or Serial Communications Interface 
-  * Byte-wide Host Interface (HI) with Direct Memory Access (DMA) support 
-  * Synchronous Serial Interface (SSI) to communicate with codecs and synchronous serial devices 
-  * Up to thirty two software-selectable time slots in Network mode 
-  * Serial Communication Interface (SCI) for full-duplex asynchronous communications 
-  * 24-bit timer/event counter also generates and measures digital waveforms 
-  * On-chip peripheral registers memory mapped in data memory space 
-  * Double-buffered peripherals  
- 
-===== Boards ===== 
-  * [[Motorola 56K2EVM]] 
- 
-===== Datenblätter =====