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embedded_systems:imx6:cb [2020-06-12 17:07] grafembedded_systems:imx6:cb [2022-09-21 09:21] Urs Graf
Zeile 25: Zeile 25:
   * 1 x Konsole, 1 x UART   * 1 x Konsole, 1 x UART
   * 24 DIO   * 24 DIO
-  * 8 Analog Out+  * 8 Analog Out (+/-10V)
 </box> </box>
 The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module. The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module.
  
-  * {{:embedded_systems:imx6:cb20schematic.pdf|Schema}} +  * {{:embedded_systems:imx6:cb20schematic.pdf|Schematics}} 
-  * github repository with Altium files, FPGA designs, and test application https://github.com/ntb-ch/cb20+  * github repository with Altium files, FPGA designs, and test application https://gitlab.ost.ch/tech/inf/public/cb20
   * [[#Known Errors]]   * [[#Known Errors]]
-  * [[software:linux:toradex:start|Linux on Toradex Colibri i.MX6]] +  * [[software:linux:yocto:cb20|Linux on Toradex Colibri i.MX6]] 
-  * Hardware configuration file for EEROS [[https://github.com/ntb-ch/cb20/blob/master/Software/cb20test/HwConfigCb20.json]]+  * Hardware configuration file for EEROS [[https://gitlab.ost.ch/tech/inf/public/cb20/blob/master/Software/cb20test/HwConfigCb20.json]]
  
 The FPGA configuration for the cb20 is made with [[https://www.flink-project.ch|flink]]. The available blocks for flink can be found on [[http://www.flink-project.ch/subdevices|flink-Wiki]].   The FPGA configuration for the cb20 is made with [[https://www.flink-project.ch|flink]]. The available blocks for flink can be found on [[http://www.flink-project.ch/subdevices|flink-Wiki]].