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embedded_systems:imx6:cb [2020-06-12 16:53] – grafembedded_systems:imx6:cb [2023-06-28 13:32] (aktuell) – Urs Graf
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   * 1 x Konsole, 1 x UART   * 1 x Konsole, 1 x UART
   * 24 DIO   * 24 DIO
-  * 8 Analog Out+  * 8 Analog Out (+/-10V)
 </box> </box>
 The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module. The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module.
  
-  * {{:embedded_systems:imx6:cb20schematic.pdf|Schema}} +  * {{:embedded_systems:imx6:cb20schematic.pdf|Schematics}} 
-  * github repository with Altium files, FPGA designs, and test application https://github.com/ntb-ch/cb20+  * github repository with Altium files, FPGA designs, and test application https://gitlab.ost.ch/tech/inf/public/cb20
   * [[#Known Errors]]   * [[#Known Errors]]
-  * [[software:linux:toradex:start|Linux on Toradex Colibri i.MX6]] +  * [[software:linux:yocto:cb20|Linux on Toradex Colibri i.MX6]] 
-  * Hardware configuration file for EEROS [[https://github.com/ntb-ch/cb20/blob/master/Software/cb20test/HwConfigCb20.json]]+  * Hardware configuration file for EEROS [[https://gitlab.ost.ch/tech/inf/public/cb20/blob/master/Software/cb20test/HwConfigCb20.json]]
  
 The FPGA configuration for the cb20 is made with [[https://www.flink-project.ch|flink]]. The available blocks for flink can be found on [[http://www.flink-project.ch/subdevices|flink-Wiki]].   The FPGA configuration for the cb20 is made with [[https://www.flink-project.ch|flink]]. The available blocks for flink can be found on [[http://www.flink-project.ch/subdevices|flink-Wiki]].  
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 === Test Program === === Test Program ===
-There is a test program using [[http://eeros.org|EEROS]] under  https://github.com/ntb-ch/cb20 for the above standard configuration. Use the steps described in [[https://wiki.eeros.org/getting_started/install_and_setup_development_environment|Installation and Setup]] to fetch all necessary repositories and build the application. \\ +There is a test program using [[http://eeros.org|EEROS]] under  [[https://gitlab.ost.ch/tech/inf/public/cb20]] for the above standard configuration. Use the steps described in [[https://wiki.eeros.org/getting_started/install/use_with_cb20]] to fetch all necessary repositories and build the application. The application reads the suitable hardware configuration file //HwConfigCb20.json// and configures all pins. The analog and digital and PWM outputs are driven. The encoder inputs are periodically logged. \\ 
-Das Testprogramm liest eine passende Hardware-Konfiguration ein. +There is a second application //cb11Test// which uses //HwConfigDb11.json//. It only has 4 encoder inputs, together with analog ouputs, ready and enable signals. This test is used to check all the necessary functions for the later use of the cb20 with the drive board [[embedded_systems:imx6:db|Drive Board der NTB]].
-  * HwConfigCb20.json: alle Pins werden konfiguriert. Auf den analogen Ausgängen, den digitalen Ausgängen und den PWM-Ausgängen werden Werte ausgegeben. Die Encoder-Eingänge werden geloggt. +
-  * HwConfigDb11.json: nur je vier Encoder-Eingänge, analoge Ausgänge, ready-Signale und das Enable-Signal werden konfiguriert. Zu dieser Hardware-Konfiguration gibt es ein spezielles Testprogramm (cb11Test).+
  
 ==== FPGA Design with Watchdog and PPWA ==== ==== FPGA Design with Watchdog and PPWA ====

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embedded_systems/imx6/cb.1591973611.txt.gz · Zuletzt geändert: 2020-06-12 16:53 von graf