Hier werden die Unterschiede zwischen zwei Versionen angezeigt.
| Beide Seiten der vorigen RevisionVorhergehende ÜberarbeitungNächste Überarbeitung | Vorhergehende Überarbeitung | ||
| embedded_systems:zynq7000:mapping_flink1 [2021-09-24 15:39] – Laszlo Arato | embedded_systems:zynq7000:mapping_flink1 [2021-11-05 11:46] (aktuell) – Urs Graf | ||
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| Zeile 1: | Zeile 1: | ||
| ====== Pin Mapping for flink1 Configuration ====== | ====== Pin Mapping for flink1 Configuration ====== | ||
| - | {{: | ||
| <WRAP blindtable 100%> | <WRAP blindtable 100%> | ||
| Zeile 121: | Zeile 120: | ||
| </ | </ | ||
| - | ====== Old Pin Mapping for flink1 Configuration ====== | ||
| - | ^FPGA pin^flink device^channel number^FPGA pin^flink device^channel number^FPGA pin^flink device^channel number^ | ||
| - | |B19|gpio|0|H15|gpio|33|W15|gpio|66| | ||
| - | |B20|::: | ||
| - | |A20|::: | ||
| - | |E17|::: | ||
| - | |D19|::: | ||
| - | |D18|::: | ||
| - | |E19|::: | ||
| - | |F17|::: | ||
| - | |L19|::: | ||
| - | |M19|::: | ||
| - | |L20|::: | ||
| - | |M20|::: | ||
| - | |M17|::: | ||
| - | |K19|::: | ||
| - | |M18|::: | ||
| - | |J19|::: | ||
| - | |L16|::: | ||
| - | |K17|::: | ||
| - | |L17|::: | ||
| - | |K18|::: | ||
| - | |H16|::: | ||
| - | |J18|::: | ||
| - | |H17|::: | ||
| - | |H18|::: | ||
| - | |G17|::: | ||
| - | |F19|::: | ||
| - | |G18|::: | ||
| - | |F20|::: | ||
| - | |G19|::: | ||
| - | |J20|::: | ||
| - | |G20|::: | ||
| - | |H20|::: | ||
| - | |K14|::: | ||