Dies ist eine alte Version des Dokuments!
The following example describes in detail how a Phytec PCM032 Board containing a mpc5200 and a FPGA is configured to be used with flink. The FPGA will contain a single channel PWM module and a single channel GPIO modul.
git clone https://github.com/flink-project/flinkvhdl.git git clone https://github.com/flink-project/flinklinux.git git clone https://github.com/flink-project/flinklib.git
Proceed as described in VHDL.
^signal^dir^pin^
| clk_clk | in | PIN_H2 |
| lpb_ack_n | out | PIN_T11 |
| lpb_ad[31] | bidir | PIN_T6 |
| lpb_ad[30] | bidir | PIN_N8 |
| lpb_ad[29] | bidir | PIN_R9 |
| lpb_ad[28] | bidir | PIN_T9 |
| lpb_ad[27] | bidir | PIN_R8 |
| lpb_ad[26] | bidir | PIN_T8 |
| lpb_ad[25] | bidir | PIN_L8 |
| lpb_ad[24] | bidir | PIN_L7 |
| lpb_ad[23] | bidir | PIN_R7 |
| lpb_ad[22] | bidir | PIN_T7 |
| lpb_ad[21] | bidir | PIN_R5 |
| lpb_ad[20] | bidir | PIN_T5 |
| lpb_ad[19] | bidir | PIN_R4 |
| lpb_ad[18] | bidir | PIN_T4 |
| lpb_ad[17] | bidir | PIN_P4 |
| lpb_ad[16] | bidir | PIN_P5 |
| lpb_ad[15] | bidir | PIN_R3 |
| lpb_ad[14] | bidir | PIN_T3 |
| lpb_ad[13] | bidir | PIN_P11 |
| lpb_ad[12] | bidir | PIN_N11 |
The pins for the PWM output and the GPIO have to be assigned according to your hardware.
lpb_ad[20] Bidir PIN_T5
lpb_ad[19] Bidir PIN_R4
lpb_ad[18] Bidir PIN_T4
lpb_ad[17] Bidir PIN_P4
lpb_ad[16] Bidir PIN_P5
lpb_ad[15] Bidir PIN_R3
lpb_ad[14] Bidir PIN_T3
lpb_ad[13] Bidir PIN_P11
lpb_ad[12]
Hint: FPGA side described in https://github.com/flink-project/flinkvhdl/wiki/3.1-LPB-Phytec-MPC5200-I-O
: Move to here, add software side