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flink on Phytec PCM032 Board (mpc5200)
The following example describes in detail how a Phytec PCM032 Board containing a mpc5200 and a FPGA is configured to be used with flink. The FPGA will contain a single channel PWM module and a single channel GPIO modul. flink was tested with the FPGA on the mpc5200io module as well as with an external FPGA connected through a SPI interface.
Onboard FPGA connected through Local Plus Bus
Setup
- Configure the board with a working Linux kernel and root file system or use the system described in Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B
- Make sure that the device tree blob is up-to-date. It must contain a node for the FPGA sitting on the local plus bus.
- Get necessary sources for the flink project.
git clone https://github.com/flink-project/flinkvhdl.git git clone https://github.com/flink-project/flinklinux.git git clone https://github.com/flink-project/flinklib.git
Configure the FPGA
Proceed as described in VHDL.
- In 5: add a block gpio and a block pwm to the system. Also add a lpb_mpc5200b_to_avalon module. Leave the standard values as they are except for the PWM module, whose base clock should be 33000000.
add unique_id Invalid LinkAdding an interface block
- In 6: set the unique id of the info subdevice ….
- After 10: the System should now look like:Invalid LinkComplete system
- In 15: choose the pins as follows:
| signal | dir | pin |
|---|---|---|
| clk_clk | in | PIN_H2 |
| lpb_ack_n | out | PIN_T11 |
| lpb_ad[31] | bidir | PIN_T6 |
| lpb_ad[30] | bidir | PIN_N8 |
| lpb_ad[29] | bidir | PIN_R9 |
| lpb_ad[28] | bidir | PIN_T9 |
| lpb_ad[27] | bidir | PIN_R8 |
| lpb_ad[26] | bidir | PIN_T8 |
| lpb_ad[25] | bidir | PIN_L8 |
| lpb_ad[24] | bidir | PIN_L7 |
| lpb_ad[23] | bidir | PIN_R7 |
| lpb_ad[22] | bidir | PIN_T7 |
| lpb_ad[21] | bidir | PIN_R5 |
| lpb_ad[20] | bidir | PIN_T5 |
| lpb_ad[19] | bidir | PIN_R4 |
| lpb_ad[18] | bidir | PIN_T4 |
| lpb_ad[17] | bidir | PIN_P4 |
| lpb_ad[16] | bidir | PIN_P5 |
| lpb_ad[15] | bidir | PIN_R3 |
| lpb_ad[14] | bidir | PIN_T3 |
| lpb_ad[13] | bidir | PIN_P11 |
| lpb_ad[12] | bidir | PIN_N11 |
| lpb_ad[11] | bidir | PIN_L11 |
| lpb_ad[10] | bidir | PIN_M11 |
| lpb_ad[9] | bidir | PIN_R14 |
| lpb_ad[8] | bidir | PIN_T14 |
| lpb_ad[7] | bidir | PIN_R13 |
| lpb_ad[6] | bidir | PIN_T13 |
| lpb_ad[5] | bidir | PIN_R12 |
| lpb_ad[4] | bidir | PIN_T12 |
| lpb_ad[3] | bidir | PIN_P13 |
| lpb_ad[2] | bidir | PIN_P12 |
| lpb_ad[1] | bidir | PIN_K10 |
| lpb_ad[0] | bidir | PIN_K11 |
| lpb_ale_n | in | PIN_R11 |
| lpb_cs_n[0] | in | PIN_N10 |
| lpb_int | out | PIN_R6 |
| lpb_oe_n | in | PIN_L9 |
| lpb_rdwr_n | in | PIN_L10 |
| lpb_ts_n | in | PIN_T10 |
| reset_reset_n | in | PIN_N9 |
The pins for the PWM output and the GPIO have to be assigned according to your hardware. The FPGA can be loaded through the onboard PROM or through serial loading from the processor, see Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B.
Überschrift
Compile the Linux kernel modules (flink Linux Kernel Modules), transfer them to the target and load them
External FPGA connected through SPI interface
The pmc5200 offers a dedicated SPI (8 bit transfers) which can be routed onto the pins of the timer group or the PSC3 group. The PSC1, PSC2, PSC3 or PSC6 can operate as an SPI with 32 bit transfers.
Setup
- Configure the board with a working Linux kernel and root file system or use the system described in Installation von Emdebian Grip auf den Phytec phyCORE-MPC5200B. Make sure to have the SPI properly configured.
- Make sure that the device tree blob is up-to-date. It must contain a node for the FPGA sitting on the local plus bus.
- Get necessary sources for the flink project.
git clone https://github.com/flink-project/flinkvhdl.git git clone https://github.com/flink-project/flinklinux.git git clone https://github.com/flink-project/flinklib.git