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--- software:flink:functions [2015-02-04 16:54] – graf
+++ software:flink:functions [2015-02-09 15:30] (aktuell) – gelöscht graf
@@ Zeile 1: / Zeile 1: @@
-====== Available Functions ======
-The functions given below have so far been implemented as VHDL modules (see [[software:flink:flink_vhdl|VHDL]]). For all of them a suitable driver is available in the [[software:flink:flink_lib|flink Userspace Library]]
-^function id^name^description^
-|0x00|InfoDevice|info device with unique id|
-|0x01|AnalogIn|analog input, ADC|
-|0x02|AnalogOut|analog output, DAC, not yet implemented|
-|0x05|DigitalIO|digital inputs and outputs, GPIO|
-|0x0c|PWM|pulse width modulated outputs|
-==== Subdevice Specific Registers ====
-As described in [[software:flink|flink, Universal Serial Interface to FPGA's]] every subdevice realizes a certain function. The function id together with status and configuration registers can be found in the header and subheader section. Every subdevice has further registers which are specific for a certain function. These registers are described below for the available functions.
-=== ADC ===
-^Offset^Size [byte] ^Name^r/w^Const^Description^
-|0x20|4|resolution|r|no|this is the number of resolvable digital steps|
-|0x24|4|value_0|r|no|channel 0: digitized input value|
-|0x28|4|value_1|r|no|channel 1: digitized input value|
-|..|4|..|r/w|no|..|
-The status and configuration registers in the subheader are unused with this function.
-=== ADC ===
-^Offset^Size [byte] ^Name^r/w^Const^Description^
-|0x20|4|resolution|r|no|this is the number of resolvable digital steps|
-|0x24|4|value_0|r|no|channel 0: digitized input value|
-|0x28|4|value_1|r|no|channel 1: digitized input value|
-|..|4|..|r/w|no|..|
-The status and configuration registers in the subheader are unused with this function.
-=== GPIO ===
-^Offset^Size [byte] ^Name^r/w^Const^Description^
-|0x20|4|dir_0|r/w|no|direction bits for channels 0 .. 31|
-|0x24|4|dir_1|r/w|no|direction bits for channels 32 .. 63|
-|..|4|..|r/w|no|..|
-|0xyy|4|val_0|r/w|no|digital value for channels 0 .. 31|
-|0xyy+4|4|val_1|r/w|no|digital value for channels 32 .. 63|
-|..|4|..|r/w|no|..|
-A value of '1' configures a pin as an output in the direction register.
-The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice.
-=== PWM ===
-^Offset^Size [byte] ^Name^r/w^Const^Description^
-|0x20|4|base_clk|r|no|base clock in Hz|
-|0x24|4|ptime_0|r/w|no|channel 0: period in multiples of base clock|
-|0x28|4|ptime_1|r/w|no|channel 1: period in multiples of base clock|
-|..|4|..|r/w|no|..|
-|0xyy|4|htime_0|r/w|no|channel 0: high time in multiples of base clock|
-|0xyy+4|4|htime_1|r/w|no|channel 1: high time in multiples of base clock|
-|..|4|..|r/w|no|..|
-The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice.

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