Dies ist eine alte Version des Dokuments!
The functions given below have so far been implemented as VHDL modules (see VHDL). For all of them a suitable driver is available in the flink Userspace Library
| function id | name | description |
|---|---|---|
| 0x00 | unused | this function id is not used |
| 0x01 | AnalogIn | analog input, ADC |
| 0x02 | AnalogOut | analog output, DAC |
| 0x0c | PWM | pulse width modulated outputs |
As described in flink, Universal Serial Interface to FPGA's every subdevice realizes a certain function. The function id together with status and configuration registers can be found in the header and subheader section. Every subdevice has further registers which are specific for a certain function. These registers are described below for the available functions.
| Offset | Size [byte] | Name | r/w | Const | Description |
|---|---|---|---|---|---|
| 0x20 | 4 | base_clk | r | no | base clock in Hz |
| 0x24 | 4 | ptime_0 | r/w | no | channel 0: period in multiples of base clock |
| 0x28 | 4 | ptime_1 | r/w | no | channel 1: period in multiples of base clock |
| .. | 4 | .. | r/w | no | .. |
| 0xyy | 4 | htime_0 | r/w | no | channel 0: high time in multiples of base clock |
| 0xyy+4 | 4 | htime_1 | r/w | no | channel 1: high time in multiples of base clock |
| .. | 4 | .. | r/w | no | .. |