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| software:flink:subdevices [2015-02-09 15:38] – graf | software:flink:subdevices [Unbekanntes Datum] (aktuell) – gelöscht - Externe Bearbeitung (Unbekanntes Datum) 127.0.0.1 | ||
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| - | ====== Available Subdevices ====== | ||
| - | The functions given below have so far been implemented as VHDL modules (see [[software: | ||
| - | ^function id^name^description^ | ||
| - | |0x00|Info|info subdevice with description| | ||
| - | |0x01|AnalogIn|analog input, ADC| | ||
| - | |0x02|AnalogOut|analog output, DAC, not yet implemented| | ||
| - | |0x05|DigitalIO|digital inputs and outputs, GPIO| | ||
| - | |0x0c|PWM|pulse width modulated outputs| | ||
| - | |||
| - | ==== Subdevice Specific Registers ==== | ||
| - | As described in [[software: | ||
| - | |||
| - | === Info Subdevice === | ||
| - | This subdevice might be present or not in a device. Its purpose is to indicate the total memory size of the whole device. It further has a 28 bytes description field. This allows for identifying a given design. | ||
| - | ^Offset^Size [byte] ^Name^r/ | ||
| - | |0x20|4|memory size|r|yes|total memory size for the device (in bytes) including all subdevices| | ||
| - | |0x24|28|description|r|yes|contains a description, | ||
| - | The status and configuration registers in the subheader are unused with this function. | ||
| - | |||
| - | === ADC === | ||
| - | ^Offset^Size [byte] ^Name^r/ | ||
| - | |0x20|4|resolution|r|yes|this is the number of resolvable digital steps| | ||
| - | |0x24|4|value_0|r|no|channel 0: digitized input value| | ||
| - | |0x28|4|value_1|r|no|channel 1: digitized input value| | ||
| - | |..|4|..|r/ | ||
| - | The status and configuration registers in the subheader are unused with this function.\\ | ||
| - | == Subtypes == | ||
| - | Currently there are two subtypes of this subdevice | ||
| - | ^ID^Description^Example^ | ||
| - | |0x1|Simple ADC with continuous sampling|ADC128S102| | ||
| - | |0x2|Advanced model with integrated filter and sampling mode selection|AD7606| | ||
| - | |||
| - | === DAC === | ||
| - | ^Offset^Size [byte] ^Name^r/ | ||
| - | |0x20|4|resolution|r|yes|this is the number of resolvable digital steps| | ||
| - | |0x24|4|value_0|r/ | ||
| - | |0x28|4|value_1|r/ | ||
| - | |..|4|..|r/ | ||
| - | The status and configuration registers in the subheader are unused with this function. | ||
| - | == Subtypes == | ||
| - | Currently there is one subtypes of this subdevice | ||
| - | ^ID^Description^Example^ | ||
| - | |0x1|Simple DAC where the outputs are continuously set. All channels are updated at the same time|AD5668| | ||
| - | |||
| - | === GPIO === | ||
| - | ^Offset^Size [byte] ^Name^r/ | ||
| - | |0x20|4|dir_0|r/ | ||
| - | |0x24|4|dir_1|r/ | ||
| - | |..|4|..|r/ | ||
| - | |0xyy|4|val_0|r/ | ||
| - | |0xyy+4|4|val_1|r/ | ||
| - | |..|4|..|r/ | ||
| - | A value of ' | ||
| - | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. | ||
| - | |||
| - | === PWM === | ||
| - | ^Offset^Size [byte] ^Name^r/ | ||
| - | |0x20|4|base_clk|r|no|base clock in Hz| | ||
| - | |0x24|4|ptime_0|r/ | ||
| - | |0x28|4|ptime_1|r/ | ||
| - | |..|4|..|r/ | ||
| - | |0xyy|4|htime_0|r/ | ||
| - | |0xyy+4|4|htime_1|r/ | ||
| - | |..|4|..|r/ | ||
| - | The status register in the subheader is unused with this function. In the configuration register setting the bit 0 will reset the subdevice. | ||