USB-BDI
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00001 /* 00002 * Copyright 2006 Free Software Foundation, Inc. 00003 * 00004 * This file is part of USB PDI 00005 * 00006 * USB PDI is free software; you can redistribute it and/or modify 00007 * it under the terms of the GNU General Public License as published by 00008 * the Free Software Foundation; either version 2, or (at your option) 00009 * any later version. 00010 * 00011 * USB PDI is distributed in the hope that it will be useful, 00012 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00013 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00014 * GNU General Public License for more details. 00015 * 00016 * You should have received a copy of the GNU General Public License 00017 * along with USB PDI; see the file COPYING. If not, write to 00018 * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, 00019 * Boston, MA 02111-1307, USA. 00020 */ 00021 00030 #include "usbpdi_common.h" 00031 00036 void initCPU(void){ 00037 CPUCS = bmCLKSPD1 | bmCLKOE;// CPU runs @ 48 MHz, enable CLOCKOUT 00038 CKCON = 0; // MOVX takes 2 cycles (41.7ns @ 48 MHz) 00039 00040 // set the slave FIFO interface to 48Mhz (internal clock) 00041 // Use GPIFPorts in Port-Mode 00042 IFCONFIG = bmIFCLKSRC | bm3048MHZ; 00043 //IFCONFIG = bmIFGPIF|bmIFCLKSRC|bm3048MHZ; //bmIFGPIF = internal Master default:00-> Port config looks i.o 00044 SYNCDELAY; //nop nop nop 00045 } 00046 00051 void initEndpoint0(void){ 00052 // reset endpoint 0 FIFO 00053 FIFORESET = bmNAKALL; 00054 SYNCDELAY; 00055 FIFORESET = 0; 00056 SYNCDELAY; 00057 00058 EP0BCH = 0; //Endpoint 0 (Byte Count High) Register 00059 SYNCDELAY; 00060 } 00061 00066 void initIOPorts(void){ 00067 // configure IO ports (all Ports are available) 00068 // all are configured as inputs (this is default code not necessary) 00069 00070 IOA = bmPORT_A_INITIAL; // Port A initial state 00071 OEA = bmPORT_A_OUTPUTS; // Port A direction register 00072 00073 IOB = bmPORT_B_INITIAL; // Port B initial state 00074 OEB = bmPORT_B_OUTPUTS; // Port B direction register 00075 00076 OEC = bmPORT_C_OUTPUTS; // Port C direction register 00077 00078 IOD = bmPORT_D_INITIAL; // Port D initial state 00079 OED = bmPORT_D_OUTPUTS; // Port D direction register 00080 00081 IOE = bmPORT_E_INITIAL; // Port E initial state 00082 OEE = bmPORT_E_OUTPUTS; // Port E direction register 00083 00084 00085 /* 00086 * BDI_555_init() 00087 * BDIddr (STATUS_LED2 STATUS_LED1 BERR DSCK DSDI DSDO HARD_RESET FREEZE) 00088 * 0 = input, 1 = output 00089 */ 00090 BDIddr = BDIddrInit; // 11000010 00091 BDIout = BDIoutInit; // 00000010 00092 }