Hier werden die Unterschiede zwischen zwei Versionen angezeigt.
Beide Seiten der vorigen RevisionVorhergehende Überarbeitung | Letzte ÜberarbeitungBeide Seiten der Revision | ||
embedded_systems:ethercat:understanding_ethercat:understanding_sync_with_dc [2019-02-08 09:51] – mgehrig2 | embedded_systems:ethercat:understanding_ethercat:understanding_sync_with_dc [2019-02-13 11:22] – mgehrig2 | ||
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===== The Sync0 Synchronisation Signal ===== | ===== The Sync0 Synchronisation Signal ===== | ||
In a DC system each participant has its own clock which is synchronized with all other clocks. | In a DC system each participant has its own clock which is synchronized with all other clocks. | ||
- | The Sync0 event is triggered synchronously | + | The Sync0 event is triggered synchronously |
==== The Sync0 Event ==== | ==== The Sync0 Event ==== | ||
The Sync0 event ist triggered on all devices of the network at the same time. | The Sync0 event ist triggered on all devices of the network at the same time. | ||
- | The slaves can read inputs and set outputs after a deterministic and configurable time after the Sync0 event. | + | The slaves can read inputs and set outputs after a deterministic and configurable time (1C32:06 + 1C32: |
Thus it is possible that all outputs in the whole network are set simultaneously within nanoseconds. | Thus it is possible that all outputs in the whole network are set simultaneously within nanoseconds. | ||
+ | The same is true for reading inputs at a determenistic time. | ||
It is also possible to set the outputs with a desired time delay. | It is also possible to set the outputs with a desired time delay. | ||
+ | |||
+ | {{ : | ||
==== DCM Master Shift Mode ==== | ==== DCM Master Shift Mode ==== |