Hier werden die Unterschiede zwischen zwei Versionen angezeigt.
Beide Seiten der vorigen RevisionVorhergehende ÜberarbeitungNächste Überarbeitung | Vorhergehende ÜberarbeitungNächste ÜberarbeitungBeide Seiten der Revision | ||
embedded_systems:imx6:cb [2020-06-03 16:32] – graf | embedded_systems:imx6:cb [2021-04-29 13:31] – Urs Graf | ||
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Zeile 25: | Zeile 25: | ||
* 1 x Konsole, 1 x UART | * 1 x Konsole, 1 x UART | ||
* 24 DIO | * 24 DIO | ||
- | * 8 Analog Out | + | * 8 Analog Out (+/-10V) |
</ | </ | ||
The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module. | The board has a EP4CE22F17C8 FPGA from Altera which is connected over the EIM bus to the Colibri module. | ||
- | * {{: | + | * {{: |
* github repository with Altium files, FPGA designs, and test application https:// | * github repository with Altium files, FPGA designs, and test application https:// | ||
* [[#Known Errors]] | * [[#Known Errors]] | ||
Zeile 64: | Zeile 64: | ||
=== Test Program === | === Test Program === | ||
- | Unter https:// | + | There is a test program using [[http:// |
- | Das Testprogramm liest eine passende Hardware-Konfiguration ein. | + | There is a second application // |
- | * HwConfigCb20.json: alle Pins werden konfiguriert. Auf den analogen Ausgängen, den digitalen Ausgängen und den PWM-Ausgängen werden Werte ausgegeben. Die Encoder-Eingänge werden geloggt. | + | |
- | | + | |
==== FPGA Design with Watchdog and PPWA ==== | ==== FPGA Design with Watchdog and PPWA ==== | ||
Zeile 79: | Zeile 77: | ||
| Dig I/O | 0x12705002 | 6 | 8 | | | | Dig I/O | 0x12705002 | 6 | 8 | | | ||
| Dig I/O (Enable/ | | Dig I/O (Enable/ | ||
+ | The pins are assigned as with the standard configuration with the following exceptions: P11 has 4 PWM channels (pin 1 to 4), PPWA is on pin 5 and 6, Watchdog is on pin 7 (granted) and 8 (pwm). | ||
==== FPGA Design with MPU9250 ==== | ==== FPGA Design with MPU9250 ==== | ||
- | This design incorporates a SPI Connection | + | This design incorporates a SPI connection |
^ flink component ^ unique id ^ id ^ nof channels ^ description ^ | ^ flink component ^ unique id ^ id ^ nof channels ^ description ^ | ||
| PWM | 0x1270C001 | 0 | 4 | | | | PWM | 0x1270C001 | 0 | 4 | | |