Pin Mapping for flink2 Configuration

FPGA PinFlink DeviceFlink Channel
M17GPIO0
K191
M182
J193
L164
K175
L176
K187
H168
J189
H1710
H1811
G1712
F1913
G1814
F2015
G1916
J2017
G2018
H2019
K1420
H1521
J1422
G1523
FPGA PinFlink DeviceFlink Channel
N15PPWA0
L141
N162
L153
M144
K165
FPGA PinFlink DeviceFlink Channel
T10PWM0
U121
U132
V123
V134
W135
T146
P147
T158
R149
Y1610
W1411
Y1712
Y1413
T1614
V1515
U1716
W1517
U1418
U1819
U1520
U1921
N1822
N2023
FPGA PinFlink DeviceFlink Channel
V18UARTTX[0]
W19RX[0]
N17TX[1]
P15RX[1]
FPGA PinFlink DeviceFunction
M15WatchdogPWM
J16WatchdogGranted
FPGA PinFlink DeviceFlink Channel
P19FQD0[A]
P200[B]
T201[A]
V201[B]
U202[A]
W202[B]
Y183[A]
V163[B]
Y194[A]
W164[B]
R165[A]
T175[B]
R176[A]
R186[B]
V177[A]
W187[B]
FPGA PinFlink DeviceADC Pin
T11ADC128S102DIN
T19SCLK
R19CS
T12DOUT
FPGA PinFlink DeviceADC Pin
D20AD7476SCLK
F16CS
E18DATA
FPGA PinXADC DeviceChannel
E17XADC0[p]
D180[n]
M191[p]
M201[n]
L192[p]
L202[n]
B193[p]
A203[n]