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Pin Mapping for flink2 Configuration

FPGA PinFlink DeviceFlink Channel
B19GPIO0
B201
A202
E173
D194
D185
E196
F177
L198
M199
L2010
M2011
M1712
K1913
M1814
J1915
L1616
K1717
L1718
K1819
H1620
J1821
H1722
H1823
G1724
F1925
G1826
F2027
G1928
J2029
G2030
H2031
K1432
H15GPIO33
J1434
G1535
FPGA PinFlink DeviceFlink Channel
T10PWM0
U121
U132
V123
V134
W135
T146
P147
T158
R149
Y1610
W1411
Y1712
Y1413
T1614
V1515
U1716
W1517
U1418
U1819
U1520
U1921
N1822
N2023
FPGA PinFlink DeviceFlink Channel
N15PPWA0
L141
N162
L153
M144
K165
FPGA PinFlink DeviceFlink Channel
V18UARTTX[0]
W19RX[0]
N17TX[1]
P15RX[1]
FPGA PinFlink DeviceFunction
M15WatchdogPWM
J16WatchdogGranted
FPGA PinFlink DeviceFlink Channel
P19FQD0[A]
P200[B]
T201[A]
V201[B]
U202[A]
W202[B]
Y183[A]
V163[B]
Y194[A]
W164[B]
R165[A]
T175[B]
R176[A]
R186[B]
V177[A]
W187[B]
FPGA PinFlink DeviceADC Pin
T11ADC128S102DIN
T19SCLK
R19CS
T12DOUT
FPGA PinFlink DeviceADC Pin
D20AD7476SCLK
F16CS
E18DATA

Altes Pin Mapping for flink2 Configuration

FPGA pinflink devicechannel numberFPGA pinflink devicechannel numberFPGA pinflink devicechannel number
B19gpio0T10pwm0P19fqd0[A]
B201U121P200[B]
A202U132T201[A]
E173V123V201[B]
D194V134U202[A]
D185W135W202[B]
E196T146Y183[A]
F177P147V163[B]
L198T158Y194[A]
M199R149W164[B]
L2010Y1610R165[A]
M2011W1411T175[B]
M1712Y1712R176[A]
K1913Y1413R186[B]
M1814T1614V177[A]
J1915V1515W187[B]
L1616U1716T11ADC128S102DIN
K1717W1517T19SCLK
L1718U1418R19CS
K1819U1819T12DOUT
H1620U1520D20AD7476SCLK
J1821U1921F16CS
H1722N1822E18DATA
H1823N2023
G1724N15PPWA0
F1925L141
G1826N162
F2027L153
G1928M144
J2029K165
G2030V18UARTtx[0]
H2031W19rx[0]
K1432N17tx[1]
H1533P15rx[1]
J1434M15Watchdogpwm
G1535J16Watchdoggranted