Hier werden die Unterschiede zwischen zwei Versionen angezeigt.
Beide Seiten der vorigen RevisionVorhergehende ÜberarbeitungNächste Überarbeitung | Vorhergehende ÜberarbeitungNächste ÜberarbeitungBeide Seiten der Revision | ||
embedded_systems:zynq7000:microzed [2019-12-05 17:06] – graf | embedded_systems:zynq7000:microzed [2021-12-30 08:16] – Urs Graf | ||
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====== MicroZed Board ====== | ====== MicroZed Board ====== | ||
- | The ZYBO contains a [[embedded_systems: | + | The MicroZed |
- | {{: | + | |
+ | =====Key Features ===== | ||
+ | [{{ : | ||
+ | * XC7Z010-1CLG400C | ||
+ | * 33.33 MHz oscillator | ||
+ | * 1 GB of DDR3 SDRAM | ||
+ | * 128 Mb of QSPI Flash | ||
+ | * Micro SD card interface | ||
+ | * 10/100/1000 Ethernet | ||
+ | * USB 2.0 | ||
+ | * USB-UART | ||
+ | * 100 User I/O (50 per connector) | ||
+ | * Configurable as up to 48 LVDS pairs or 100 single-ended I/Software | ||
===== Manuals ===== | ===== Manuals ===== | ||
Zeile 7: | Zeile 19: | ||
* {{ : | * {{ : | ||
* {{ : | * {{ : | ||
+ | |||
+ | ===== Design Considerations ===== | ||
+ | The board can be powered by the USB connection. For this, your USB must be able to deliver 500mA. In that case the power banks of the FPGA will not be powered. | ||
+ | * [[carrier|Carrier Card Design]] | ||
+ | * [[https:// | ||
+ | |||
+ | ===== Configuration Files ===== | ||
+ | Choose a bit-file to load the programmable logic part (PL) or a mcs-file to load the flash. The msc file contains the bit-file together with a first stage boot loader. See [[https:// | ||
+ | ^configuration^bit-file^mcs-file^flink configuration^pin mapping^ | ||
+ | |flink1|flink1.bit|BOOTflink1.mcs|Info Device, Description = ZedFlink 1 27.1.2020 (left adjusted)|[[mapping_flink1|mapping]]| | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |flink2|flink2.bit|BOOTflink2.mcs|Info Device, Description = ZedFlink 2 12.10.2021|[[mapping_flink2|mapping]]| | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |flink3|flink3.bit|BOOTflink3.mcs|Info Device, Description = ZedFlink 3 15.8.2021 (left adjusted)|[[mapping_flink3|mapping]]| | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |flink4|flink4.bit|BOOTflink4.mcs|Info Device, Description = ZedFlink 4 7.12.2021 (left adjusted)|[[mapping_flink4|mapping]]| | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
===== Further Documents===== | ===== Further Documents===== | ||
- | * [[http://store.digilentinc.com/zybo-zynq-7000-arm-fpga-soc-trainer-board/ |Sehr gutes Einsteiger Tutorial]]. Für das Tutorial wird Vivado | + | * [[https://www.element14.com/community/community/ |
- | * [[.: | + | * [[.: |