Altera FPGAs can be configured by a microcontroller using 5 wires (Passive Serial). The FPGA loader is a Linux kernel module which uses the gpio subsystem to drive the signals on the 5 wires. The version on github supports the Colibri module from Toradex (iMX6). For other plattforms you have to change the pin numbers in the source code.

In order to be able to load the FPGA design you have to enable the creation of the RBF file in Quartus under Device and Pin Options:

Make sure to load the kernel modul fpga_loader.ko before using. After sucessfully loading the FPGA you have to unload the kernel module in order to use the gpio's as usual.

The RBF file can be loaded with dd:

# dd if=design.rbf of=/dev/fpga_loader bs=5M

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf shows how the FPGA is configured properly. The timing is as follows timing.pdf. Please note that Two DCLK falling edges are required after CONF_DONE goes high to begin the initialization of the device.