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software:linux:fpga_loader [2020-03-18 16:36] grafsoftware:linux:fpga_loader [2023-04-11 08:35] (aktuell) Urs Graf
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 <box 30% right green | QuickLinks> <box 30% right green | QuickLinks>
-  * [[https://github.com/ntb-ch/fpga_loader| Source Code]]+  * [[https://gitlab.ost.ch/tech/inf/public/fpga-loader| Source Code]]
   * [[https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cfg/cfg_cf51001.pdf| Configuring Altera FPGAs]]   * [[https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/hb/cfg/cfg_cf51001.pdf| Configuring Altera FPGAs]]
 </box> </box>
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 ===== Details ===== ===== Details =====
 [[https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf]] shows how the FPGA is configured properly.  [[https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-iv/cyiv-51008.pdf]] shows how the FPGA is configured properly. 
-The timing is as follows {{ :software:linux:timing.pdf |}}+The timing is as follows {{ :software:linux:timing.pdf |}}. Please note that //Two DCLK falling edges are required after CONF_DONE goes high to begin the 
 +initialization of the device.//